Advanced Analog Front-End Design
Our highly-differentiated Analog Front-End (AFE) is composed of best-in-class high-speed and high-resolution analog-to-digital and digital-to-analog converters (ADCs and DACs) which provide the interface between the real-world signal coming from the cables and the digital processing engine.
Mixed-Mode Signal Processing Architecture (MMSP)
We have designed a novel analog architecture that we call MMSP, which provides a different partitioning of signal processing between the analog and digital domains, leading to optimized power and die size.
Multi-Core Signal Processor Architecture (MCSP)
We use our proprietary transistor-level implementation and mapping techniques to create highly efficient multi-core processing engines, which we call MCSPs.
Advanced power management techniques
By combining innovative techniques based on back biasing and voltage scaling, our engineers were able to significantly reduce the impact of static and dynamic leakage power.
THE IEEE® 802.3bzTM STANDARD
Together with Cisco, Freescale and Xilinx, we formed the NBASE-T Alliance, a not-for-profit organization dedicated to the development and promotion of the 5G/2.5G technology. Aquantia is the first company in over 40 years of Ethernet existence to have a standard created purely from its own technology. We are the sole inventor of AQrate technology and the only supplier of multigigabit ICs in production today. Aquantia played a key role is pushing the Multi-Gigabit technology through the standardization process within IEEE. In September 2016, IEEE officially approved IEEE® 802.3bzTM as a standard, a record timeframe of less than 2 years from proposal to approval.
FIVE-SPEED PHY ENABLES 5Gbps & 2.5Gbps ETHERNET RATES
OVER LEGACY COPPER CABLES
Ramin Farjadrad, PhD
Senior Vice President, Technology Development
Ramin Farjadrad is a co-founder of Aquantia and served as its Chief Architect from 2005 till 2012, as the Vice President of Technology from 2012 till 2015, and as Vice President, Technology Development, reporting to the CEO’s office since 2015. He received his Bachelor of Science from Sharif University in 1994, and MS and PhD from Stanford University in Electrical Engineering Computer Science in 1996 and 2000 respectively. MoreLess
Dr. Farjadrad has established himself as a leading architect of high-performance communications semiconductors with wide range of expertise in analog/mixed-signal integrated circuits (ICs), signal processing and coding. He started his career at SUN Microsystems in 1995, and joined the Stanford Center for Integrated Circuits (CIS) in 1996 where he proposed and developed a mixed-mode architecture for low-power multi-Gbps transceivers, including the first 10Gbps PAM4 SerDes in 1998. He also co-founded Velio Communications and served as Chief Engineer from 1999 to 2003 when it was acquired by Rambus and LSI Logic. He then served as a senior principal at Rambus till 2005. Dr. Farjadrad holds over 80 granted/pending patents and has published numerous papers in the field of communication ICs and systems.