It’s what we do together that sets us apart

Aquantia connectivity solutions power the most advanced products in the world, for the most challenging markets. Join us and work on compelling technologies that contribute directly to out customers’ success.

Principal Hardware Design Engineer (Digital Design/Verification)

Responsibilities

In this position, you will be a key part of the world-wide digital design validation
team at Aquantia spanning across design centers in Toronto, Canada; Bengaluru,
India and San Jose. You will architect and implement the chip and system level
verification test-bench which can be portable across various simulation, emulation
and prototyping platforms. You will be the core member of the Aquantia
verification think-tank influencing various aspects of pre- and post- Silicon
validation we would like to set up for the future products. It is a very
exciting time to join Aquantia as we transition to developing multiple products
for diverse industries in parallel.

Qualifications

  • Expert understanding of digital verification methodologies and
    tools including object-oriented test-bench, formal verification, high
    level modeling, portable APIs and stimulus across simulation and lab,
    reusability of validation code across HW and SW teams.
  • Expertise in coding in UVM, C, C++
  • Expertise in creating system level test-plans, coverage plan,
    constrained random end to end test stimuli to meet use-cases and
    verification goals
  • Expertise in FPGA based pre-silicon validation environments,
    porting of DV tests and code to FPGA and silicon, jointly working with SW
    team on bring-up and stress testing.
  • Experience in diagnosing issues in FPGA platforms and silicon in
    the lab and correlate them back to simulation environments
  • Experience in coding in scripting languages such as Perl, Python to
    set up lab based test environment.
  • Experience in using C++ or SystemC architecture models in digital
    DV environments.
  • Experience in Ethernet, 10GBase-T, PHY, MAC and switching
    protocols.
  • Experience in buses such as PCIe, MDIO and other networking buses

Education
and Experience

  • MS/BS, Electrical or Electronics or Computer engineering
  • Minimum of 10 years of hands-on digital verification experience